The standard configuration, with a "fat core", is pretty much the best you can do in 4 layers for a "modern" design. By "modern" I mean something with a dense component load, probably double-sided load, and random-ish routing (so, exactly the opposite of the old '80s TTL design shown in the article image we're discussing in sibling comment). All the "better" 4-layer stackups require outer layers to be doing a lot of heavy lifting, which they cannot do if they are filled with parts. When you assume they have to be filled with parts -- because if they aren't filled with parts then I can make it smaller and people want that! -- then you just cannot use that space as anything else. Henry Ott discusses a number of stackup options for four layers, and the standard one is the only option of his that survives with this restriction. If you don't like that, tough, I guess you're paying for 6 or 8 layers. Which isn't too bad these days!
You complain about power (VDD) plane noise. This might be important in ultra-low-noise design, I don't know, I try not to do that sort of work. In normal work it is not a factor. Your power and ground planes should be connected by a pretty thick network of capacitors, so they are transparent to each other. Your power plane is as good as a ground plane for AC, and AC is the only thing that's hard to deal with. So there is no issue routing the bottom layer on the other side of power, not ground. (Of course, that is no longer true if your power plane is split. Split power planes in a high-speed 4-layer design can be nasty, and are how I justify my worth to my employers!)
Nailed it. This was confusing to me too hearing about other stacks, as they stopped being effective once I used the top (And sometimes bottom) for components, which happens on every design I make. If not, I'd shrink the design! EM concerns aside, I want easy access to power and ground.
I don't think you are arguing for the same thing as Hartley. I strongly approve of some things he says: "people believe that just pouring ground on top and bottom lowers EMI... well it doesn't!" (6:04) or "there is no four layer stackup that's wonderfu... no 'gosh, isn't that great?' four-layer stackup, they just don't exist, it's four layers, you know, you can only do so much with it" (7:29). No mention of VDD noise or discussion of how a good, well-decoupled power plane is basically as good as a ground plane for AC return currents.
I believe you are trying to get a stackup that supports use of stripline for signals. That is a reasonable goal but it is only appropriate for very high speed digital designs. If you route stripline on a regular basis, you're either very experienced or clueless. No middle ground!
Really, for heavy-duty work, you need six. And you can argue with me, and say that by great skill you can get things into four layers, and that is true. But six-layer boards are cheap compared to what they used to be, so for anything not going into true high-volume manufacturing, just go for six or eight. In all other cases, the design cost hit will outweigh the parts cost savings.
The standard configuration, with a "fat core", is pretty much the best you can do in 4 layers for a "modern" design. By "modern" I mean something with a dense component load, probably double-sided load, and random-ish routing (so, exactly the opposite of the old '80s TTL design shown in the article image we're discussing in sibling comment). All the "better" 4-layer stackups require outer layers to be doing a lot of heavy lifting, which they cannot do if they are filled with parts. When you assume they have to be filled with parts -- because if they aren't filled with parts then I can make it smaller and people want that! -- then you just cannot use that space as anything else. Henry Ott discusses a number of stackup options for four layers, and the standard one is the only option of his that survives with this restriction. If you don't like that, tough, I guess you're paying for 6 or 8 layers. Which isn't too bad these days!
You complain about power (VDD) plane noise. This might be important in ultra-low-noise design, I don't know, I try not to do that sort of work. In normal work it is not a factor. Your power and ground planes should be connected by a pretty thick network of capacitors, so they are transparent to each other. Your power plane is as good as a ground plane for AC, and AC is the only thing that's hard to deal with. So there is no issue routing the bottom layer on the other side of power, not ground. (Of course, that is no longer true if your power plane is split. Split power planes in a high-speed 4-layer design can be nasty, and are how I justify my worth to my employers!)